INTERNSHIP ON RAPID SYSTEM PROTOTYPING TECHNOLOGIES WITH FOCUS ON DIGITAL SIGNAL
PROCESSING, ARTIFICIAL NEURAL NETWORKS, COMMUNICATIONS, INSTRUMENTATION AND
CONTROL SYSTEMS
MONDAY - (06/07/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 9:00 AM	WELCOME SESSION	Dr. WILFRIDO MORENO - USF
		Lic. MARTIN DOCKWEILER - UDABOL
9:00 - 9:50 AM	KEYNOTE SPEAKER	Dr. Ronanth Zavaleta Mercado
9:50 - 10:00 AM	COFFEE BREAK
10:00 - 12:30 M	INSTRUMENTATION AND CONTROL SYSTEMS, PART 1	Dr. CARLOS SMITH/Dr. SANJUAN
	INDUSTRIAL INSTRUMENTATION
	SENSORS
	ACTUATORS
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	INSTRUMENTATION AND CONTROL SYSTEMS, PART 1 (CONT.)	Dr. CARLOS SMITH/Dr. SANJUAN
	INDUSTRIAL INSTRUMENTATION (CONT)
	CONTROLLER
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	INSTRUMENTATION AND CONTROL SYSTEMS, PART 1 (CONT.)	Dr. CARLOS SMITH/Dr. SANJUAN
	INDUSTRIAL INSTRUMENTATION (CONT)
	DATA ACQUISITION SYSTEMS
7:00 PM	Welcome Official Reception
TUESDAY - (06/08/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	INSTRUMENTATION AND CONTROL SYSTEMS, PART 2	Dr. CARLOS SMITH/Dr. SANJUAN
	PROCESS CONTROL
	FEEDBACK CONTROL LOOP
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 M	INSTRUMENTATION AND CONTROL SYSTEMS, PART 2 (CONT.)	Dr. CARLOS SMITH/Dr. SANJUAN
	PROCESS CONTROL (CONT)
	IMPLEMENTATION ISSUES
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	INSTRUMENTATION AND CONTROL SYSTEMS, ADVANCE	Dr. CARLOS SMITH/Dr. SANJUAN
	INTELLIGENT PROCESS CONTROL
	FUZZY CONTROL
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	INSTRUMENTATION AND CONTROL SYSTEMS, ADVANCE (CONT.)	Dr. CARLOS SMITH/Dr. SANJUAN
	INTELLIGENT PROCESS CONTROL
	FUZZY CONTROL
7:00 PM	DINNER
WEDNESDAY - (06/09/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	INSTRUMENTATION AND CONTROL SYSTEMS, ADVANCE	Dr. CARLOS SMITH/Dr. SANJUAN
	INTELLIGENT PROCESS CONTROL
	NEURAL NETWORK-BASED CONTROL
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	INSTRUMENTATION AND CONTROL SYSTEMS, ADVANCE (CONT.)	Dr. CARLOS SMITH/Dr. SANJUAN
	FURTHER APPLICATIONS AND EXAMPLES
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	INSTRUMENTATION AND CONTROL SYSTEMS, ADVANCE	Dr. CARLOS SMITH/Dr. SANJUAN
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	INSTRUMENTATION AND CONTROL SYSTEMS, ADVANCE (CONT.)	Dr. CARLOS SMITH/Dr. SANJUAN
7:00 PM	DINNER
THURSDAY - (06/10/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	DIGITAL SIGNAL PROCESSING, PART 1	Dr. ORLANDO HERNANDEZ/Prof.  EDUARDO ZUREK
	INTRODUCTION
	BASIC CONCEPTS OF SIGNALS
	BASIC CONCEPTS OF SAMPLED SIGNALS
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	DIGITAL SIGNAL PROCESSING, PART 1 (CONT.)	Dr. ORLANDO HERNANDEZ/Prof.  EDUARDO ZUREK
	PRINCIPLES AND CALCULATION METHODS OF THE DISCRETE FOURRIER TRANSFORM
	DEFINITION, PROPERTIES, AND EXAMPLES OF THE Z-TRANSFORM
	PRINCIPLES AND CALCULATION METHODS OF THE FAST FOURRIER TRANSFORM (FFT)
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	APPLICATIONS IN DSP, PART 1	EDUARDO ZUREK
	TOPIC 1: INTRODUCTION TO DSP ARCHITECTURE AND PROGRAMMING TOOL
	TOPIC 2: GPIO CONFIGURATION
	1ST LABORATORY: GPIO CONFIGURATION
	DEVELOPMENT AND SYNTHESIS
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	APPLICATIONS IN DSP, PART 1 (CONT.)	EDUARDO ZUREK
	TOPIC 3: INTERRUPT HANDLING
	2ND LABORATORY: HARDWARE INTERRUPT CONFIGURATION (IRQA & IRQB)
	DEVELOPMENT AND SYNTHESIS
7:00 PM	DINNER
FRIDAY - (06/11/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	DIGITAL SIGNAL PROCESSING, PART 2	Dr. ORLANDO HERNANDEZ/Prof.  EDUARDO ZUREK
	DESIGN PRINCIPLES OF DIGITAL FILTERS: FIR AND IIR
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	DIGITAL SIGNAL PROCESSING, PART 2 (CONT.)	Dr. ORLANDO HERNANDEZ/Prof.  EDUARDO ZUREK
	PRINCIPLES AND CALCULATION METHODS OF THE DISCRETE COSINE TRANSFORM (DCT)
	APPLICATION EXAMPLES
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	APPLICATIONS IN DSP, PART 2	EDUARDO ZUREK
	TOPIC 3: INTERRUPT HANDLING (CONT.)
	3RD LABORATORY: TIMERS INTERRUPT CONFIGURATION
	DEVELOPMENT AND SYNTHESIS
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	APPLICATIONS IN DSP, PART 2 (CONT.)	EDUARDO ZUREK
	TOPIC 4: PROCESSING SPEED & CLOCK SYSTHESIS
	4TH LABORATORY: PLL CONFIGURATION
	DEVELOPMENT AND SYNTHESIS
7:00 PM	DINNER
SATURDAY - (06/12/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	DIGITAL SIGNAL PROCESSING, PART 3	Dr. ORLANDO HERNANDEZ/Prof.  EDUARDO ZUREK
	APPLICATION EXAMPLES (CONT.)
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	DIGITAL SIGNAL PROCESSING, PART 3 (CONT.)	Dr. ORLANDO HERNANDEZ/Prof.  EDUARDO ZUREK
	CATCH UP
	ADVANCED TOPICS
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	APPLICATIONS IN DSP, PART 3	EDUARDO ZUREK
	TOPIC 5: SAMPLING & FILTERING
	5TH LABORATORY: SAMPLING & SSI CONFIGURATION
	DEVELOPMENT AND SYNTHESIS
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	APPLICATIONS IN DSP,  PART 3 (CONT.)	EDUARDO ZUREK
	TOPIC 5: SAMPLING & FILTERING (CONT.)
	6TH LABORATORY: FILTERS & DSPs
	DEVELOPMENT AND SYNTHESIS
7:00 PM	DINNER
MONDAY - (06/14/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	NEURAL NETWORKS ALGORITHMS, PART 1	Dr. MARCO SANJUAN
	INTRODUCTION TO ANN
	MOTIVATION FOR NEURAL NETWORKS. MODELS, PHYSIOLOGICAL ANALOGIES
	LINEAR ASSOCIATIONS, HEBB LEARNING, DELTA RULE, TLU'S, LINEAR SEPARABILITY,
	QUADRATIC MACHINES, MACHINE CAPACITY, MULTILAYER NETS, COMMITTEE MACHINES
	BACK PROPAGATION: THEORY.
	BACK PROPAGATION: TRAINING, EXAMPLES, SOFTWARE.
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	NEURAL NETWORKS ALGORITHMS, PART 2	Dr. MARCO SANJUAN
	RADIAL BASIS FUNCTION NETWORKS.
	HOPFIELD NETWORKS, TSP EXAMPLE.
	BOLTZMANN MACHINES.
	COMPETITIVE LEARNING.
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	NEURAL NETWORKS ALGORITHMS, PART 3	Dr. MARCO SANJUAN
	INTRODUCTION TO GENETIC ALGORITHMS.
	ADVANCE TOPICS IN ANN
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	NEURAL NETWORKS ALGORITHMS, PART 3 (CONT)	Dr. MARCO SANJUAN
	FURTHER APPLICATIONS AND EXAMPLES
7:00 PM	DINNER
TUESDAY - (06/15/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	APPLICATIONS ON FUZZY LOGIC	Dr. MARCO SANJUAN
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	APPLICATIONS ON FUZZY LOGIC (CONT.)	Dr. MARCO SANJUAN
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	ADVANCE TOPICS ON FUZZY LOGIC	Dr. MARCO SANJUAN
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	ADVANCE TOPICS ON FUZZY LOGIC (CONT.)	Dr. MARCO SANJUAN
7:00 PM	DINNER
WEDNESDAY - (06/16/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	COMMUNICATIONS AND NETWORK SYSTEMS, PART 1	Dr. MIGUEL LABRADOR/Dr. ROMEO VELARDE
	INTRODUCTION TO OPTICAL NETWORKS, WDM TECHNOLOGY, SYSTEMS AND DEVICES
	IP/WDM ISSUES:
	RWA, SURVIVABILITY, VIRTUAL TOPOLOGY DESIGN, DYNAMIC RECONFIGURATION
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	COMMUNICATIONS AND NETWORK SYSTEMS, PART 1 (CONT.)	Dr. MIGUEL LABRADOR/Dr. ROMEO VELARDE
	IP/WDM ISSUES: (CONT)
	RWA, SURVIVABILITY, VIRTUAL TOPOLOGY DESIGN, DYNAMIC RECONFIGURATION
	GMPLS, TCP over OPTICAL NETWORKS
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	COMMUNICATIONS AND NETWORK SYSTEMS, PART 2	Dr. MIGUEL LABRADOR/Dr. ROMEO VELARDE
	WIRELESS NETWORKS
	INTRODUCTION AND EVOLUTION
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	COMMUNICATIONS AND NETWORK SYSTEMS, PART 2 (CONT.)	Dr. MIGUEL LABRADOR/Dr. ROMEO VELARDE
	WIRELESS NETWORKS
	802.11, 802.16
7:00 PM	DINNER
THURSDAY - (06/17/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	IMPLEMENTATIONS IN VHDL, PART I	Dr. JAMES LEFFEW/LUIS NAVARRETE
	HISTORY OF VHDL
	THE DESIGN ENTITY
	SEQUENTIAL PROGRAMMING
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	IMPLEMENTATIONS IN VHDL, PART I (CONT)	Dr. JAMES LEFFEW/LUIS NAVARRETE
	BEHAVIORAL DESIGN
	SIGNALS AND VARIABLES
	SEQUENTIAL INSTRUCTIONS
12:30 - 2:30 PM	LUNCH
2:30 - 4:20 PM	RAPID SYSTEM PROTOTYPING, INTRODUCTION	Dr. JAMES LEFFEW/LUIS NAVARRETE
	History and evolution, CPLD's and FPGA's
	Altera UP2 Board
	Altera Quartus II - Introduction
4:20 - 4:30 PM	COFFEE BREAK
4:30 - 6:30 PM	Lab No 1 - Logic designs, Textual and Graphical Entries	LUIS NAVARRETE
	Introduction to Megafunctions, Libraries and
	Software features.
7:00 PM	DINNER
FRIDAY - (06/18/04)
HOUR	DESCRIPTION	LECTURER
8:30 - 10:20 AM	IMPLEMENTATIONS IN VHDL, PART 2	Dr. JAMES LEFFEW/LUIS NAVARRETE
	CONCURRENT PROGRAMMING
	DATA-FLOW DESIGN
	SIGNAL ASSIGNMENT
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	IMPLEMENTATIONS IN VHDL, PART 2 (CONT.)	Dr. JAMES LEFFEW/LUIS NAVARRETE
	CONCURRENT SIGNAL ASSIGNMENT
	PACKAGE
	SUBPROGRAMS (FUNCTIONS AND PROCEDURES)
12:30 - 2:00 PM	LUNCH
2:30 - 4:20 PM	Lab No 2 - Microprocessor, Textual Entry, Simulations and	LUIS NAVARRETE
	Development
4:20 - 4:30 PM	COFFEE BREAK
4:00 - 5:30 PM	Lab No 3 - VGA Implementation, Simulation and Synthesis.	LUIS NAVARRETE
7:00 - 10:00 PM	CLOSING CEREMONY	Dr. WILFRIDO MORENO
SATURDAY - (06/19/04)
	DESCRIPTION	LECTURER
8:30 - 10:20 AM	IMPLEMENTATIONS IN VHDL, PART 3	Dr. JAMES LEFFEW
	STRUCTURAL DESIGN
	COMPONENTS AND ENTITY INSTANTIATIONS
	HIERARCHY
10:20 - 10:30 AM	COFFEE BREAK
10:30 - 12:30 PM	IMPLEMENTATIONS IN VHDL, PART 3 (CONT.)	Dr. JAMES LEFFEW
	CONFIGURATION SPECIFICATIONS
	CONFIGURATION DECLARATION
	TEST BENCH
12:30 - 2:30 PM	LUNCH